1. The Field of the Invention
The present invention relates to analog integrated circuit design, and more particularly, to low voltage, enhanced output impedance current mirrors.
2. Background and Related Art
Computing technology has revolutionized the way people work and play and has contributed enormously to the advancement of humankind. Computing technology is largely enabled by various integrated circuit designs. In many analog circuit designs, it is often desirable to mirror a current from one portion of the circuit to another. While there are various types of current mirrors, FIG. 1 illustrates a specialized conventional current mirror that mirrors an input current IIN from one branch in the circuit to another branch of the circuit in the form of IOUT.
The current mirroring is enabled by connecting the gates of both n-type Metal-Oxide Semiconductor Field Effect Transistors (hereafter also referred to as an xe2x80x9cnMOSFETxe2x80x9d) m and ml to each other and to the drain terminal of nMOSFET m. It is well known to those of ordinary skill in the art that the configuration of nMOSFET m2 with the Operational Amplifier AMP and with the rest of the circuitry as shown in FIG. 1 results in a current mirror often referred to as an xe2x80x9cenhanced output impedance current mirrorxe2x80x9d since the use of the amplifier significantly increases output impedance ROUT as compared to a basic cascoded current mirror. The circuit is also known as a xe2x80x9cregulated cascode current sourcexe2x80x9d since gain is used to enhance the output impendence of the current source. Specifically, the output impedance ROUT of the illustrated current mirror is defined by the following equation (1):
ROUT=(rdsl)xc3x97(gm2xc3x97rds2)xc3x97(A+1)xe2x80x83xe2x80x83(1)
where rdsl is the drain-source resistance of the nMOSFET m1, gm2 is the transconductance of nMOSFET m2, rds2 is the drain-source resistance of the nMOSFET m2, and A is the open-loop gain of the amplifier AMP. A traditional cascode current mirror would have an output impedance according to the following equation (2):
ROUT=(rdsl)xc3x97(gm2xc3x97rds2)xe2x80x83xe2x80x83(2)
Accordingly, the enhanced output impedance current mirror increases output impedance by a factor of (A+1).
It is advantageous for the output impedance of the enhanced output impedance current mirror to remain large for small values of VOUT. As VOUT is decreased, the output impedance will remain close to its nominal value until nMOSFET m2 enters the linear region when the drain-to-source voltage Vds2 of nMOSFET m2 decreases to the saturation voltage Vdsat2 of nMOSFET m2, which is equal to the gate-source voltage Vgs2 of nMOSFET m2 minus the threshold voltage Vi2 of nMOSFET m2. In other words, nMOSFET m2 enters the linear region when the following equation (3) holds:
Vds2=Vdsat2=Vgs2xe2x88x92V2xe2x80x83xe2x80x83(3)
Since the amplifier AMP has minimal offset, the voltage at the negative terminal of the amplifier (namely, Vdsl) is equal to the voltage at the positive terminal of the amplifier (namely, VREF). Accordingly, the minimum output voltage VOUTmin is equal to the reference voltage VREF plus the saturation voltage Vdsat2 of the nMOSFET m2 according to the following equation (4):
VOUTmin=VREF+Vdsat2xe2x80x83xe2x80x83(4)
Accordingly, since it is advantageous to minimize VOUTmin, it is also advantageous to minimize VREF. This can be done so long as VREF is greater than Vdsatl (Vdsatl=Vgslxe2x88x92Vtl). Any further reduction would push the nMOSFET ml into the linear region thereby degrading the current mirroring function.
Since Vdsatl is process and temperature dependent, biasing nMOSFET ml so that Vdsl exceeds Vdsatl by a minimal amount can be challenging. Accordingly, what would be advantageous would be a circuit that allows for the proper biasing of nMOSFET ml to allow a small minimum output voltage with little additional circuitry to occupy additional chip space.
The foregoing problems with the prior state of the art are overcome by the principles of the present invention, which are directed towards an enhanced output impedance current mirror that properly biases the transistor while using less additional circuitry than a standard enhanced output current mirror.
As in conventional enhanced output impedance current mirrors, the new enhanced output impedance current mirror includes an nMOSFET M1 having a source terminal that is connected to a low voltage source, and an nMOSFET M2 having a source terminal that is connected to a drain terminal of the first nMOSFET M1. The current is mirrored from a different part of circuit by applying appropriate biases to the gate terminal of nMOSFET M1 as is conventionally known. The output current is the current going into the source terminal of nMOSFET M2, and the output impedance is the impedance looking into the source terminal of nMOSFET M2.
A uniquely designed circuit is connected to nMOSFETs M1 and M2 so as to apply the appropriate biases to nMOSFET M1 such that the minimum output voltage may be only the sum of the saturation voltages of both of the nMOSFETs M1 and M2. The operational amplifier also provides the necessary gain to enhance output impedance thereby serving two roles with just a few additional components configured in a certain previously unknown way described hereinafter.
As in a conventional operational amplifier, the operational amplifier includes a current source (I) having a first terminal connected to a high voltage source. In this description and in the claims, one node in a circuit is xe2x80x9cconnectedxe2x80x9d to another node in the circuit if charge carriers freely flow (even through some devices) between the two nodes during normal operation of the circuit. A differential pair is then provided having gate terminals as input terminals to the operational amplifier. Specifically, one pMOSFET M3 has a gate terminal connected to the source terminal of the nMOSFET M2. A source terminal of the pMOSFET M3 is connected to a second terminal of the current source (I). A drain terminal of the pMOSFET M3 is connected to a gate terminal of the second nMOSFET (M2). Similarly a second pMOSFET (M4) has a source terminal connected to the second terminal of the current source (I).
Unlike conventional enhanced output impedance current mirrors, however, the operational amplifier includes four nMOSFETs M5-M8 having a common gate terminal that is connected to the drain of pMOSFET M4. By properly designing the length to width ratios as will be described further below, a desired reference voltage and drain-source voltage of transistor M1 may be obtained to thereby significantly reduce the lowest output voltage of the enhanced output impedance current mirror.
Another embodiment of the invention may be accomplished by substituting all nMOSFETs with pMOSFETs, and vice versa, and by tying any terminals that were connected to a lower voltage source to a high voltage source, and vice versa. Accordingly, an enhanced output impedance current mirror is obtained using minimal additional devices while allowing for a reduced minimum output voltage.
Additional features and advantages of the invention will be set forth in the description that follows, and in part will be obvious from the description, or may be learned by the practice of the invention. The features and advantages of the invention may be realized and obtained by means of the instruments and combinations particularly pointed out in the appended claims. These and other features of the present invention will become more fully apparent from the following description and appended claims, or may be learned by the practice of the invention as set forth hereinafter.